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The peak-SNR performances of voltage-mode versus time-mode circuits: the PMOS-NMOS stack use case

Ziabakhsh, Soheyl, Gagnon, Ghyslain et Roberts, Gordon W.. 2018. « The peak-SNR performances of voltage-mode versus time-mode circuits: the PMOS-NMOS stack use case ». IEEE Transactions on Circuits and Systems II: Express Briefs.
Compte des citations dans Scopus : 1. (In press)

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Item Type: Peer reviewed article published in a journal
Professor:
Professor
Gagnon, Ghyslain
Affiliation: Génie électrique
Date Deposited: 17 Apr 2018 13:48
Last Modified: 17 Apr 2018 13:48
URI: http://espace2.etsmtl.ca/id/eprint/16604

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