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Asynchronous component implementation methodology for GALS design in FPGAs

Gagné, René, Belzile, Jean et Thibeault, Claude. 2009. « Asynchronous component implementation methodology for GALS design in FPGAs ». In Joint IEEE North-East Workshop on Circuits and Systems and Taisa Conference (NEWCAS-TAISA) (Toulouse, France, June 28-July 01, 2009) Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Compte des citations dans Scopus : 5.

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Item Type: Conference proceeding
Professor:
Professor
Belzile, Jean
Thibeault, Claude
Affiliation: Génie électrique
Date Deposited: 30 Oct 2012 18:18
Last Modified: 30 Oct 2012 18:18
URI: http://espace2.etsmtl.ca/id/eprint/2726

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