A practical design method for prototyping self-timed processors using FPGAs

Fiorentino, Mickael, Savaria, Yvon, Thibeault, Claude et Gervais, Pascal. 2016. « A practical design method for prototyping self-timed processors using FPGAs ». In 2016 IEEE International Symposium on Circuits and Systems (ISCAS) (Montréal, QC, Canada, May 22-25, 2016) pp. 1754-1757. Piscataway, NJ, USA : IEEE.
Compte des citations dans Scopus : 3.

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Item Type:	Conference proceeding
Professor:	Professor Thibeault, Claude
Affiliation:	Génie électrique
Date Deposited:	05 Oct 2016 18:15
Last Modified:	05 Oct 2016 18:15
URI:	https://espace2.etsmtl.ca/id/eprint/13808

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