Sub-ps resolution programmable delays implemented in a Xilinx FPGA

Berrima, Safa, Blaquière, Yves et Savaria, Yvon. 2017. « Sub-ps resolution programmable delays implemented in a Xilinx FPGA ». In IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS) (Boston, MA, USA, Aug. 06-09, 2017), pp. 918-921. Piscataway, NJ, USA : IEEE.
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Official URL: http://dx.doi.org/10.1109/MWSCAS.2017.8053074

Item Type:

Conference proceeding

Professor:

Professor
Blaquière, Yves

Affiliation:

Génie électrique

Date Deposited:

22 Nov 2017 20:22

Last Modified:

22 Jan 2020 19:35

URI:

https://espace2.etsmtl.ca/id/eprint/15971

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