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Adding debug enhancements to assertion checkers for hardware emulation and silicon debug

Boulé, Marc, Chenard, Jean-Samuel and Zilic, Zeljko. 2006. « Adding debug enhancements to assertion checkers for hardware emulation and silicon debug ». In International Conference on Computer Design (San Jose, CA, USA, Oct. 01-04, 2006) pp. 294-299. IEEE.
Compte des citations dans Scopus : 42.

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Item Type: Conference proceeding
Professor:
Professor
Boulé, Marc
Affiliation: Autres
Date Deposited: 14 Oct 2022 20:46
Last Modified: 14 Oct 2022 20:46
URI: https://espace2.etsmtl.ca/id/eprint/25633

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