Efficient automata-based assertion-checker synthesis of SEREs for hardware emulation

Boulé, Marc and Zilic, Zeljko. 2007. « Efficient automata-based assertion-checker synthesis of SEREs for hardware emulation ». In Asia and South Pacific Design Automation Conference (Yokohama, Japan, Jan. 23-26, 2007) pp. 324-329. IEEE.
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Official URL: https://doi.org/10.1109/ASPDAC.2007.358006

Item Type:	Conference proceeding
Professor:	Professor Boulé, Marc
Affiliation:	Autres
Date Deposited:	14 Oct 2022 20:47
Last Modified:	14 Oct 2022 20:47
URI:	https://espace2.etsmtl.ca/id/eprint/25638

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