Tester memory requirements and test application time reduction for delay faults with Digital Captureless test Sensors

Thibeault, C., Hariri, Y. and Hobeika, C.. 2012. « Tester memory requirements and test application time reduction for delay faults with Digital Captureless test Sensors ». Journal of Electronic Testing: Theory and Applications, vol. 28, nº 2. pp. 229-242.

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Item Type:	Peer reviewed article published in a journal
Professor:	Professor Thibeault, Claude
Affiliation:	Génie électrique
Date Deposited:	19 Feb 2013 16:26
Last Modified:	07 Sep 2024 17:39
URI:	https://espace2.etsmtl.ca/id/eprint/3524

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