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Inter-reticle stitching rules and constraints for a wafer-scale integrated circuit

Savaria, Yvon, Blaquière, Yves et André, Walder. 2011. « Inter-reticle stitching rules and constraints for a wafer-scale integrated circuit ». Coll. « Application Note », vol. CMC-00200-01762. CMC Microsystems.

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Item Type: Technical report (UNSPECIFIED)
Professor:
Professor
Blaquière, Yves
Affiliation: Autres
Date Deposited: 22 Feb 2017 20:11
Last Modified: 22 Feb 2017 20:11
URI: https://espace2.etsmtl.ca/id/eprint/14700

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