Boland, Jean-François, Thibeault, Claude et Zilic, Zeljko.
2005.
« Using Matlab and Simulink in a SystemC Verification Environment ».
In Proceedings of Design and Verification Conference (DVCon05) (San Jose, CA, USA, Feb. 14-16, 2005 )
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EE2_-_DVCon05_paper_final.pdf Download (675kB) |
Item Type: | Conference proceeding | |||
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Affiliation: | Génie électrique | |||
Date Deposited: | 13 Dec 2012 20:30 | |||
Last Modified: | 05 Apr 2018 15:08 | |||
URI: | https://espace2.etsmtl.ca/id/eprint/3133 |
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