Lemayian, Joel Poncha, Gagnon, Ghyslain, Zhang, Kaiwen et Giard, Pascal.
2026.
« EVMx: An FPGA-based accelerator for smart contract processing ».
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 34, nº 2.
pp. 554-567.
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Résumé
Ethereum leverages smart contracts (SCs) to power decentralized applications (dApps), with execution handled by the Ethereum virtual machine (EVM) within an Ethereum client. Other blockchain platforms, including Avalanche, Polkadot, Aurora, and Cardano, have also adopted the EVM. However, the performance of the EVM is often constrained by the limitations of general-purpose processors, a challenge that has been explored in the literature. This work aims to further address the limitation by proposing EVMx, a dedicated single-core SC execution engine implemented on a field programmable gate array (FPGA). EVMx follows a processor-like architecture inspired by the RISC philosophy. By exploiting the parallelism and high-speed processing capabilities of FPGA hardware, EVMx achieves a 61% to 99% reduction in execution time for commonly used operation codes compared to traditional central processing unit (CPU)-based environments. Furthermore, EVMx executes entire Ethereum blocks with a percentage reduction in execution time between 6% and 56% against comparable FPGA implementations and 98% to 99% compared to CPU-based EVMs in the literature. These results demonstrate the potential of EVMx to significantly accelerate SC execution and enhance the performance of EVM-compatible blockchains.
| Type de document: | Article publié dans une revue, révisé par les pairs |
|---|---|
| Chercheur(-euse): | Chercheur(-euse) Gagnon, Ghyslain Zhang, Kaiwen Giard, Pascal |
| Affiliation: | Génie électrique, Génie électrique, Génie électrique |
| Date de dépôt: | 21 nov. 2025 20:57 |
| Dernière modification: | 25 mars 2026 20:50 |
| URI: | https://espace2.etsmtl.ca/id/eprint/33034 |
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