Lemayian, Joel Poncha, Gagnon, Ghyslain, Zhang, Kaiwen et Giard, Pascal.
2026.
« HardVault: A hybrid FPGA-based Ethereum-Bitcoin cold wallet ».
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 34, nº 8.
pp. 2469-2482.
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Résumé
Cryptographic wallets play a vital role in securing digital assets within blockchain networks by managing private keys that authorize secure transactions. However, side channel analysis (SCA) attacks have become a serious threat, enabling attackers to extract sensitive information by exploiting algorithmic weaknesses in microcontroller-based wallets, resulting in the loss of millions of dollars in digital assets. In hierarchically deterministic (HD) systems, the compromise of a single primary key can endanger all subsequent child keys, while the use of independent keys for each account introduces complexity and challenges in key management. This work presents HardVault, a field programmable gate array (FPGA)-based cryptocurrency wallet that supports both Bitcoin and Ethereum. HardVault introduces the first hardware wallet architecture that implements both non-deterministic (ND) and HD key generation modes directly in hardware, giving users the flexibility to choose either approach based on their security and usability needs. By leveraging constant-time operations and hardware-enforced private-key isolation, the design significantly improves resilience to SCA attacks. In addition, the architecture prioritizes resource efficiency to minimize area usage without compromising security, making it well-suited for compact, portable hardware wallet applications. Implementation on a ZCU104 FPGA shows that HardVault uses only 27% of available look-up tables (LUTs). Compared to the Trezor One cryptocurrency (crypto) wallet, the proposed implementation achieves 9× higher energy efficiency, 8× lower latency, and 7× higher throughput.
| Type de document: | Article publié dans une revue, révisé par les pairs |
|---|---|
| Chercheur(-euse): | Chercheur(-euse) Gagnon, Ghyslain Zhang, Kaiwen Giard, Pascal |
| Affiliation: | Génie électrique, Génie électrique, Génie électrique |
| Date de dépôt: | 29 juin 2026 17:24 |
| Dernière modification: | 26 sept. 2026 14:09 |
| URI: | https://espace2.etsmtl.ca/id/eprint/33847 |
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