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Liste des publications de "Blaquière, Yves"Nombre de documents archivés : 117. 2024
Aimaier, Nueraimaiti, Blaquiere, Yves, Constantin, Nicolas et Cowan, Glenn.
2024.
« An FPGA-based on-the-fly reconfigurable low-power SHEPWM inverter with a compact SiP implementation ».
IEEE Transactions on Power Electronics, vol. 39, nº 5.
pp. 5942-5953.
Moshrefi, Amir Hossein, Blaquiere, Yves et Nabki, Frederic.
2024.
« A precise and reliable engine knock detection utilizing meta classifier ».
In IEEE International Symposium on Circuits and Systems (Singapore, Singapore, May 19-22, 2024)
Institute of Electrical and Electronics Engineers Inc..
Riboullet, Allan, Nabki, Frederic, Blaquière, Yves et Cowan, Glenn.
2024.
« Configurable and intelligent switched CMOS current driver powering arrays of electrothermal actuators for MEMS switches ».
In IEEE International Symposium on Circuits and Systems (Singapore, Singapore, May 19-22, 2024)
Institute of Electrical and Electronics Engineers Inc.. 2023
Bensalem, Hachem, Blaquiere, Yves et Savaria, Yvon.
2023.
« An efficient OpenCL-Based implementation of a SHA-3 co-processor on an FPGA-centric platform ».
IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 70, nº 3.
pp. 1144-1148.
Nobert, Gabriel, Constantin, Nicolas G. et Blaquière, Yves.
2023.
« A coupled transmission-line-based measurement technique for currents in switch-mode converters ».
IEEE Transactions on Electromagnetic Compatibility, vol. 65, nº 5.
pp. 1535-1547.
Sadrimanesh, Hamid, Blaquière, Yves et Nabki, Frederic.
2023.
« Toward 2.5D structures for multi-channel MEMS acoustic-based digital isolators using through silicon openings ».
In 21st IEEE Interregional NEWCAS Conference (NEWCAS) (Edinburgh, UK, June 26-28, 2023)
Institute of Electrical and Electronics Engineers Inc..
Shuaibu, Abdurrashid Hassan, Blaquière, Yves et Nabki, Frédéric.
2023.
« Toward a polysilicon-based electrostatically actuated DC MEMS switch ».
In 21st IEEE Interregional NEWCAS Conference (NEWCAS) (Edinburgh, UK, June 26-28, 2023)
Institute of Electrical and Electronics Engineers Inc.. 2022
Nguyen, Van Ha, Aimaier, Nueraimaiti, Nobert, Gabriel, Pham, Tan, Constantin, Nicolas, Blaquiere, Yves et Cowan, Glenn.
2022.
« A reconfigurable power system-in-package module using GaN HEMTs and IC bare dies on LTCC substrate: Design - implementation - experiment and future directions ».
In 20th IEEE Interregional NEWCAS Conference (IEEE NEWCAS) (Quebec City, QC, Canada, June 19-22, 2022)
pp. 188-192.
IEEE.
Nguyen, Van Ha, Do, Xuan-Dien, Blaquiere, Yves et Cowan, Glenn.
2022.
« Multi-phase hybrid boost converter with high conduction loss reduction and fast dynamic response for automotive applications ».
In 20th IEEE Interregional NEWCAS Conference (IEEE NEWCAS) (Quebec City, QC, Canada, June 19-22, 2022)
pp. 183-187.
IEEE.
Nguyen, Van Ha, Do, Xuen-Dien, Blaquiere, Yves et Cowan, Glenn.
2022.
« A 3.3 V 0.1-1 a hybrid buck-boost converter with 85-97 % power efficiency range highly-suited for battery-powered devices using low-profile high-DCR inductor ».
In 20th IEEE Interregional NEWCAS Conference (IEEE NEWCAS) (Quebec City, QC, Canada, June 19-22, 2022)
pp. 303-307.
IEEE.
Shuaibu, Abdurrashid Hassan, Nabki, Frederic et Blaquiere, Yves.
2022.
« A MEMS electrothermal actuator designed for a DC switch aimed at power switching applications and high voltage resilience ».
In 20th IEEE Interregional NEWCAS Conference (IEEE NEWCAS) (Quebec City, QC, Canada, June 19-22, 2022)
pp. 317-321.
IEEE. 2021
Aimaier, Nueraimaiti, Ly, Nam, Nobert, Gabriel, Blaquière, Yves, Constantin, Nicolas et Cowan, Glenn.
2021.
« SHEPWM Class-D amplifier with a reconfigurable gate driver integrated circuit ».
In IEEE International Symposium on Circuits and Systems (ISCAS) (Daegu, Korea (South), May 22-28, 2021)
Institute of Electrical and Electronics Engineers.
Bensalem, Hachem, Blaquière, Yves et Savaria, Yvon.
2021.
« Acceleration of the secure hash algorithm-256 (SHA-256) on an FPGA-CPU cluster using OpenCL ».
In IEEE International Symposium on Circuits and Systems (ISCAS) (Daegu, Korea (South), May 22-28, 2021)
Institute of Electrical and Electronics Engineers.
Berrima, Safa, Blaquière, Yves et Savaria, Yvon.
2021.
« Ring-oscillator-based high accuracy low complexity multichannel time-to-digital converter architecture for field-programmable gate arrays ».
IEEE Transactions on Instrumentation and Measurement, vol. 70.
Nguyen, Van Ha, Alameh, Abdul Hafiz, Ly, Nam, Blaquière, Yves et Cowan, Glenn.
2021.
« A novel minimum-phase dual-inductor hybrid boost converter with PWM voltage-mode controller ».
In IEEE International Symposium on Circuits and Systems (ISCAS) (Daegu, Korea (South), May 22-28, 2021)
Institute of Electrical and Electronics Engineers.
Nguyen, Van Ha, Ly, Nam, Alameh, Abdul Hafiz, Blaquière, Yves et Cowan, Glenn.
2021.
« A versatile 200-V capacitor-coupled level shifter for fully floating multi MHz gate drivers ».
IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, nº 5.
pp. 1625-1629.
Nguyen, Van Ha, Ly, Nam, Alameh, Abdul Hafiz, Blaquière, Yves et Cowan, Glenn.
2021.
« Compact and low-power under-voltage lockout and thermal-shutdown protection circuits using a novel Low-IQ all-in-one bandgap comparator ».
In IEEE International Symposium on Circuits and Systems (ISCAS) (Daegu, Korea (South), May 22-28, 2021)
IEEE.
Nobert, Gabriel, Alameh, Abdul-Hafiz, Ly, Nam, Constantin, Nicolas G. et Blaquière, Yves.
2021.
« Towards an LTCC SiP for control system in safety-critical applications ».
In IEEE International Symposium on Circuits and Systems (ISCAS) (Daegu, Korea (South), May 22-28, 2021)
Institute of Electrical and Electronics Engineers. 2020
Bensalem, Hachem, Blaquière, Yves et Savaria, Yvon.
2020.
« In-FPGA instrumentation framework for OpenCL-Based designs ».
IEEE Access, vol. 8.
pp. 212979-212994.
Berrima, Safa, Blaquière, Yves et Savaria, Yvon.
2020.
« Fine resolution delay tuning method to improve the linearity of an unbalanced time-to-digital converter on a Xilinx FPGA ».
IET Circuits, Devices and Systems, vol. 14, nº 8.
pp. 1243-1252.
Ly, Nam, Aimaier, Nueraimaiti, Alameh, Abdul Hafiz, Blaquière, Yves, Cowan, Glenn et Constantin, Nicolas G..
2020.
« A high voltage multi-purpose on-the-fly reconfigurable half-bridge gate driver for GaN HEMTs in 0.18-mum HV SOI CMOS technology ».
In 18th IEEE International New Circuits and Systems Conference (NEWCAS) (Montréal, QC, Canada, June 16-19, 2020)
pp. 178-181.
Piscataway, NJ, USA : IEEE. 2019Bensalem, H. et Blaquière, Y.. 2019. « In-system monitoring of OpenCL-Based designs on FPGA ». Communication lors de la conférence : LACIME First Annual Congress (Montréal, QC, Canada, 21 fév. 2019).
Bensalem, Hachem, Blaquière, Yves et Savaria, Yvon.
2019.
« Toward in-system monitoring of OpenCL-based designs on FPGA ».
In IEEE International Symposium on Circuits and Systems (ISCAS) (Sapporo, Japan, May 26-29, 2019)
Institute of Electrical and Electronics Engineers Inc.. Blaquière, Yves. 2019. « Configurability: from FPGA to Electronic Systems and Power Microsystems ». Communication lors de la conférence : LACIME First Annual Congress (Montréal, QC, Canada, 21 fév. 2019).
Darvishi, Mostafa, Audet, Yves, Blaquière, Yves, Thibeault, Claude et Pichette, Simon.
2019.
« On the susceptibility of SRAM-based FPGA routing network to delay changes induced by ionizing radiation ».
IEEE Transactions on Nuclear Science, vol. 66, nº 3.
pp. 643-654.
Laflamme-Mayer, Nicolas, Kowarzyk, Gilbert, Blaquière, Yves, Savaria, Yvon et Sawan, Mohamad.
2019.
« A defect-tolerant reusable network of DACs for wafer-scale integration ».
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 27, nº 2.
pp. 304-315. 2018
Berrima, Safa, Blaquière, Yves et Savaria, Yvon.
2018.
« Diagnosis algorithms for a reconfigurable and defect tolerant JTAG scan chain in large area integrated circuits ».
Integration, vol. 62.
pp. 159-169.
Darvishi, Mostafa, Audet, Yves et Blaquière, Yves.
2018.
« Delay monitor circuit and delay change measurement due to SEU in SRAM-based FPGA ».
IEEE Transactions on Nuclear Science, vol. 65, nº 5.
pp. 1153-1160.
Lepercq, Etienne, Blaquière, Yves et Savaria, Yvon.
2018.
« A pattern-based routing algorithm for a novel electronic system prototyping platform ».
Integration, vol. 62.
pp. 224-237. 2017
Berrima, Safa, Blaquière, Yves et Savaria, Yvon.
2017.
« A multi-measurements RO-TDC implemented in a Xilinx field programmable gate array ».
In 2017 IEEE International Symposium on Circuits and Systems (ISCAS) (Baltimore, MD, USA, May 28-31, 2017)
Piscataway, NJ, USA : IEEE.
Berrima, Safa, Blaquière, Yves et Savaria, Yvon.
2017.
« Sub-ps resolution programmable delays implemented in a Xilinx FPGA ».
In IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS) (Boston, MA, USA, Aug. 06-09, 2017)
pp. 918-921.
Piscataway, NJ, USA : IEEE. Darvishi, M., Audet, Y. et Blaquière, Y.. 2017. « Delay monitor circuit for sensitive nodes in SRAM-Based FPGA ». Affiche numéro PF-1 présentée lors de la conférence : IEEE Nuclear and Space Radiation Effects Conference (New Orleans, LA, USA, July 17-21, 2017). 2016
Hussain, Wasim, Fakhoury, Hussein, Desgreys, Patricia, Blaquière, Yves et Savaria, Yvon.
2016.
« An asynchronous delta-modulator based A/D converter for an electronic system prototyping platform ».
IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 63, nº 6.
pp. 751-762.
Hussain, Wasim, Savaria, Yvon et Blaquiere, Yves.
2016.
« A compact spatially configurable differential input stage for a field programmable interconnection network ».
In IEEE International Symposium on Circuits and Systems (ISCAS) (Montréal, QC, Canada, May 22-25, 2016)
pp. 313-316.
Institute of Electrical and Electronics Engineers Inc..
Hussain, Wasim, Valorge, Olivier, Blaquière, Yves et Savaria, Yvon.
2016.
« A novel spatially configurable differential interface for an electronic system prototyping platform ».
Integration, vol. 55.
pp. 129-137.
Souari, Anis, Thibeault, Claude, Blaquiere, Yves et Velazco, Raoul.
2016.
« Towards an efficient SEU effects emulation on SRAM-based FPGAs ».
Microelectronics Reliability, vol. 66.
pp. 173-182. 2015Blaquière, Yves. 2015. « Toward an enhanced programmable device ». Communication lors de la conférence : 9th NAMIS International Summer School : Nano and Micro Systems (Montreal, QC, Canada, June 29-July 03, 2015). Hussain, W., Blaquière, Y. et Savaria, Y.. 2015. « Asynchronous ƩΔ-modulator based A/D converter for electronic system prototyping platform ». Affiche présentée lors de la conférence : Congrès ACFAS/Colloque annuel ReSMiQ (Rimouski, QC, Canada, 25-29 mai 2015).
Hussain, Wasim, Blaquière, Yves et Savaria, Yvon.
2015.
« An interface for open-drain bidirectional communication in field programmable interconnection networks ».
IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, nº 10.
pp. 2465-2475.
Laflamme-Mayer, Nicolas, Blaquière, Yves et Sawan, Mohamad.
2015.
« A configurable analog buffer dedicated to a wafer-scale prototyping platform ».
Analog Integrated Circuits and Signal Processing, vol. 82, nº 1.
pp. 57-66.
Sion, Gontran, Blaquière, Yves et Savaria, Yvon.
2015.
« Defect diagnosis algorithms for a field programmable interconnect network embedded in a very large area integrated circuit ».
In 21st IEEE International On-Line Testing Symposium (IOLTS) (Halkidiki, Greece, July 06-08, 2015)
pp. 83-88.
IEEE.
Souari, Anis, Thibeault, Claude, Blaquière, Yves et Velazco, Raoul.
2015.
« An automated fault injection for evaluation of LUTs robustness in SRAM-based FPGAs ».
In 2015 IEEE East-West Design & Test Symposium (EWDTS) (Batumi, GA, USA, Sept. 26-29, 2015)
IEEE.
Souari, Anis, Thibeault, Claude, Blaquière, Yves et Velazco, Raoul.
2015.
« Optimization of SEU emulation on SRAM FPGAs based on sensitiveness analysis ».
In 2015 IEEE 21st International On-Line Testing Symposium (IOLTS) (Halkidiki, Greece, July 6-8, 2015)
pp. 36-39.
Piscataway, NJ, USA : IEEE. 2014Blaquière, Yves. 2014. « Toward an enhanced programmable device ». Communication lors de la conférence : Journée de l'Innovation ReSMiQ (Montreal, QC, Canada, 18 sept. 2014).
Blaquière, Yves, Basile-Bellavance, Yan, Berrima, Safa et Savaria, Yvon.
2014.
« Design and validation of a novel reconfigurable and defect tolerant JTAG scan chain ».
In IEEE International Symposium on Circuits and Systems (ISCAS) (Melbourne, VIC, Australia, June 01-05, 2014)
pp. 2559-2562.
IEEE. Darvishi, M., Audet, Y., Blaquière, Y. et Thibeault, C.. 2014. « Circuit level modeling of extra combinational delays in SRAM FPGAs due to transient ionizing radiation ». Affiche présentée lors de la conférence : IEEE Nuclear and Space Radiation Effects Conference (Paris, France, July 14-18, 2014).
Darvishi, Mostafa, Audet, Yves, Blaquière, Yves, Thibeault, Claude, Pichette, Simon et Tazi, Fatima Zahra.
2014.
« Circuit level modeling of extra combinational delays in SRAM-based FPGAs due to transient ionizing radiation ».
IEEE Transactions on Nuclear Science, vol. 61, nº 6.
pp. 3535-3542.
Guillemot, Mikaël, Nguyen, Hai, Bougataya, Mohammed, Blaquière, Yves, Lakhssassi, Ahmed, Shields, Mary et Savaria, Yvon.
2014.
« Wafer-scale rapid electronic systems prototyping platform : User support tools and thermo-mechanical validation ».
In
Novel advances in microsystems technologies and their applications.
pp. 69-102. CRC Press. Hussain, W., Blaquière, Y. et Savaria, Y.. 2014. « An interface for open-drain bi-directional communication in field programmable interconnection networks ». Affiche présentée lors de la conférence : TEXPO national competition (CMC Microsystems) (Houston, TX, USA, Apr. 06-08, 2014).
Laflamme-Mayer, Nicolas, Blaquière, Yves, Savaria, Yvon et Sawan, Mohamad.
2014.
« A configurable multi-rail power and I/O pad applied to wafer-scale systems ».
IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 61, nº 11.
pp. 3135-3144. Souari, Anis, Thibeault, Claude, Blaquière, Yves et Velazco, Raoul. 2014. « Towards a realistic SEU effects emulation on SRAM based FPGAs ». Affiche présentée lors de la conférence : IEEE Nuclear and space radiation effects (NRSEC) (Paris, France, July 14-18, 2014). 2013
Baratli, Karim, Lakhssassi, Ahmed, Blaquière, Yves et Savaria, Yvon.
2013.
« A netlist pruning tool for an electronic system prototyping platform ».
In IEEE 11th International New Circuits and Systems Conference (NEWCAS) (Paris, France, June 16-19, 2013)
IEEE Computer Society.
Diop, Mamadou Diobet, Radji, Moufid, Hamoui, Anas A., Blaquière, Yves et Izquierdo, Ricardo.
2013.
« Evaluation of anisotropic conductive films based on vertical fibers for post-CMOS wafer-level packaging ».
IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 3, nº 4.
pp. 581-591.
Guillemot, Mikael, Blaquière, Yves et Savaria, Yvon.
2013.
« Software rendering methods to display wafer scale integrated circuit dataset ».
In 26th IEEE Canadian Conference on Electrical and Computer Engineering (CCECE 2013) (Regina, SK, Canada, May 05-08, 2013)
IEEE.
Hussain, Wasim, Savaria, Yvon et Blaquière, Yves.
2013.
« An interface for the I2C protocol in the WaferBoard ».
In IEEE International Symposium on Circuits and Systems (ISCAS2013) (Beijing, China, May 19-23, 2013)
pp. 1492-1495.
IEEE.
Laflamme-Mayer, Nicolas, Andre, Walder, Valorge, Olivier, Blaquière, Yves et Sawan, Mohamad.
2013.
« Configurable input-output power pad for wafer-scale microelectronic systems ».
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 21, nº 11.
pp. 2024-2033.
Laflamme-Mayer, Nicolas, Sawan, Mohamad et Blaquière, Yves.
2013.
« A configurable analog buffer dedicated to a wafer-scale prototyping platform of electronic systems ».
In IEEE Fourth Latin American Symposium on Circuits and Systems (LASCAS) (Cusco, Peru, Feb. 27-Mar. 01, 2013)
IEEE Computer Society. 2012
Al-Terkawi Hasib, Omar, André, Walder, Blaquière, Yves et Savaria, Yvon.
2012.
« Propagating analog signals through a fully digital network on an electronic system prototyping platform ».
In IEEE International Symposium on Circuits and Systems (ISCAS) (Seoul, Korea, Republic of, May 20-23, 2012)
pp. 1983-1986.
IEEE Computer Society. Blaquière, Yves. 2012. « Waferboard(TM) : Prototypage rapide pour les systèmes électroniques ». Communication lors de la conférence : Séminaire IEEE de la branche étudiante de l'UQAM (Montreal, QC, Canada, Déc. 2012).
Nguyen, Hai H., Guillemot, Mikael, Savaria, Yvon et Blaquière, Yves.
2012.
« A new approach for pin detection for an electronic system prototyping reconfigurable platform ».
In 23rd IEEE International Symposium on Rapid System Prototyping (RSP) (Tampere, Finland, Oct. 11-12, 2012)
pp. 122-127.
IEEE Computer Society. Savaria, Y., Guillemot, M., Nguyen, H. H., Blaquière, Y. et Lakhssassi, A.. 2012. « Technologies at the heart of a wafer scale rapid prototyping electronic system ». Communication lors de la conférence : CMOS Emerging Technologies (CMOSET) (Vancouver, BC, Canada, July 18-20, 2012).
Saydé, Michel, Lakhssassi, Ahmed, Bougataya, Mohammed, Terkawi, Omar et Blaquière, Yves.
2012.
« SoC systems thermal monitoring using embedded sensor cells unit ».
In IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS) (Boise, ID, USA, Aug. 05-08, 2012)
pp. 1052-1055.
IEEE. Thibeault, C., Pichette, S., Audet, Y., Savaria, Y., Rufenacht, H., Gloutnay, E. et et al.. 2012. « On extra combinational delays in SRAM FPGAs due to radiations ». Communication lors de la conférence : IEEE Nuclear and Space Radiation Effects Conference (Miami, FL, USA, July 16-20, 2012). Thibeault, C., Pichette, S., Audet, Y., Savaria, Y., Rufenacht, H., Gloutnay, E. et Et all. 2012. « Méthodologie de conception, vérification, et test des systèmes embarqués tolérants aux radiations ». Affiche présentée lors de la conférence : AVIO403 Journée CRIAQ : Destination 2022).
Thibeault, Claude, Pichette, Simon, Audet, Yves, Savaria, Yvon, Rufenacht, H., Gloutnay, E., Blaquière, Yves, Moupfouma, F. et Batani, Naïm.
2012.
« On extra combinational delays in SRAM FPGAs due to transient ionizing radiations ».
IEEE Transactions on Nuclear Science, vol. 59, nº 6.
pp. 2959-2965. 2011
André, Walder, Blaquière, Yves et Savaria, Yvon.
2011.
« A wafer-scale rapid electronic systems prototyping platform ».
In
Advanced Applications of Rapid Prototyping Technology in Modern Engineering.
pp. 207-224. Rijeka, Croatia : In tech.
Badreddine, Mohamed, Blaquière, Yves et Boukadoum, Mounir.
2011.
« Machine-learning framework for automatic netlist creation ».
In IEEE International Symposium of Circuits and Systems (ISCAS) (Rio de Janeiro, Brazil, May 15-18, 2011)
pp. 2865-2868.
IEEE. Blaquière, Yves. 2011. « Le WaferBoard(TM) - une plateforme de prototypage rapide pour les systèmes électroniques ». Communication lors de la conférence : Congrès ACFAS/Colloque annuel ReSMiQ (Sherbrooke, QC, Canada, Mai 2011).
Laflamme-Mayer, Nicolas, Blaquière, Yves et Sawan, Mohamad.
2011.
« A large range and fine tuning configurable Bandgap reference dedicated to wafer-scale systems ».
In 18th IEEE International Conference on Electronics, Circuits and Systems (ICECS) (Beirut, Lebanon, Dec. 11-14, 2011)
pp. 25-28.
IEEE Computer Society.
Laflamme-Mayer, Nicolas, Sawan, Mohamad et Blaquière, Yves.
2011.
« A dual-power rail, low-dropout, fast-response linear regulator dedicated to a wafer-scale electronic systems prototyping platform ».
In IEEE 9th International New Circuits and Systems Conference (NEWCAS) (Bordeaux, France, June 26-29, 2011)
pp. 438-441.
IEEE Computer Society. Lakhssassi, A., Savaria, Y., Bougataya, M., Blaquière, Y., Popovic, P. et Shields, M.. 2011. « LAIC based system design : a thermo-mechanical and power issue ». Communication lors de la conférence : CMC Microsystems Annual Symposium (Gatineau, QC, Canada, Oct. 2011). Savaria, Y. et Blaquière, Y.. 2011. « A Wafer-Scale rapid electronic systems prototyping platform ». Communication lors de la conférence : CMOS Emerging Technologies (CMOSET) (Whistler, BC, Canada, June 15-17, 2011).
Savaria, Yvon, Blaquière, Yves et André, Walder.
2011.
« Inter-reticle stitching rules and constraints for a wafer-scale integrated circuit ».
Coll. « Application Note », vol. CMC-00200-01762.
CMC Microsystems.
Savaria, Yvon, Blaquière, Yves et André, Walder.
2011.
« Physical design flow and techniques for layout of wafer-scale circuit with through-silicon vias ».
Coll. « Application Note », vol. CMC-00200-01761.
CMC Microsystems.
Valorge, Olivier, Andre, Walder, Savaria, Yvon et Blaquière, Yves.
2011.
« Power supply analysis of a large area integrated circuit ».
In IEEE 9th International New Circuits and Systems Conference (NEWCAS) (Bordeaux, France, June 26-29, 2011)
pp. 398-401.
IEEE Computer Society. 2010
Berriah, Oussama, Bougataya, Mohammed, Lakhssassi, Ahmed, Blaquière, Yves et Savaria, Yvon.
2010.
« Thermal analysis of a miniature electronic power device matched to a silicon wafer ».
In 8th IEEE International NEWCAS Conference (Montreal, QC, Canada, June 20-23, 2010)
pp. 129-132.
IEEE. Blaquière, Yves. 2010. « Les compétences langagières dans un cours de microélectronique ». Communication lors de la conférence : RUSAF : Soutenir les compétences langagières dans l'enseignement des disciplines : le rôle des mesures d'aide en français (Montréal, QC, Canada, 11 juin 2010).
Bougataya, Mohammed, Berriah, Oussama, Lakhssassi, Ahmed, Dahmane, Adel-Omar, Blaquière, Yves, Savaria, Yvon, Norman, Richard et Prytula, Richard.
2010.
« Thermo-mechanical analysis of a reconfigurable wafer-scale integrated circuit ».
In IEEE International Conference on Electronics, Circuits, and Systems (ICECS) (Athens, Greece, Dec. 12-15, 2010)
pp. 315-318.
IEEE Computer Society. Diop, M. D., Blaquière, Y. et et al.. 2010. « Waferboard(TM) rapid prototyping platform for electronic systems ». Affiche présentée lors de la conférence : TEXPO CMC Microsystems (Ottawa, ON, Canada, Oct. 04-05, 2010). Diop, M. D., Radji, M., Andre, W., Blaquière, Y., Hamoui, A. A. et Izquierdo, R.. 2010. « Caractérisation électrique d'interconnexions avancées de type vias traversants (TSVs) pour une application à l'échelle d'un substrat ». Affiche présentée lors de la conférence : 79e Congrès ACFAS/Colloque annuel ReSMiQ (Sherbrooke, QC, Canada, Mai 2010).
Diop, Mamadou D., Radji, Moufid, Andre, Walder, Blaquière, Yves, Hamoui, Anas A. et Izquierdo, Ricardo.
2010.
« Electrical characterization of annular through silicon vias for a reconfigurable wafer-sized circuit board ».
In IEEE 19th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) (Austin, TX, USA, Oct. 25-27, 2010)
pp. 245-248.
IEEE Computer Society.
Laflamme-Mayer, Nicolas, Valorge, Olivier, Blaquière, Yves et Sawan, Mohamad.
2010.
« A low-power, small-area voltage reference array for a wafer-scale prototyping platform ».
In 8th IEEE International NEWCAS Conference (NEWCAS) (Montreal, QC, Canada, June 20-23, 2010)
pp. 189-192.
IEEE Computer Society.
Valorge, Olivier, Blaquière, Yves et Savaria, Yvon.
2010.
« A spatially reconfigurable fast differential interface for a wafer scale configurable platform ».
In IEEE International Conference on Electronics, Circuits, and Systems (ICECS) (Athens, Greece, Dec. 12-15, 2010)
pp. 1176-1179.
IEEE Computer Society. 2009
Basile-Bellavance, Yan, Blaquière, Yves et Savaria, Yvon.
2009.
« Faults diagnosis methodology for the waferNet interconnection network ».
In Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA) (Toulouse, France, June 28-July 01, 2009)
IEEE Computer Society. Blaquière, Yves. 2009. « Le WaferBoard(TM) - une plateforme de prototypage rapide pour les systèmes électroniques ». Communication lors de la conférence : CoFaMic : La Confection et la Fabrication de Dispositifs Microélectroniques et Microsystèmes (Montréal, QC, Canada, Févr. 2009). Fecteau, Karl, Thibeault, Claude, Savaria, Yvon, Blaquière, Yves, Laurin, Jean-Jacques et Jin, Zhong-Fang (inventeurs) 27 octobre 2009. « Methods, apparatus, and systems for reducing interference on nearby conductors ». Norman, Richard S. (titulaire(s)). Brevet américain US 7,609,778.
Lepercq, Etienne, Blaquière, Yves, Norman, Richard et Savaria, Yvon.
2009.
« Workflow for an electronic configurable prototyping system ».
In IEEE International Symposium on Circuits and Systems (ISCAS) (Taipei, Taiwan, May 24-27, 2009)
pp. 2005-2008.
IEEE.
Lepercq, Étienne, Valorge, Olivier, Basile-Bellavance, Yan, Laflamme-Mayer, Nicolas, Blaquière, Yves et Savaria, Yvon.
2009.
« An interconnection network for a novel reconfigurable circuit board ».
In 2nd Microsystems and Nanoelectronics Research Conference (MNRC) (Ottawa, ON, Canada, Oct. 13-14, 2009)
pp. 53-56.
IEEE. Norman, Richard S., Blaquière, Yves et Savaria, Yvon (inventeurs) 9 juin 2009. « Communications bus for a parallel processing system ». Hyperchip Inc. (titulaire(s)). Brevet américain US 7,546,570. 2008
Basile-Bellavance, Yan, Lepercq, Etienne, Blaquière, Yves et Savaria, Yvon.
2008.
« Hardware/software system co-verification of an active reconfigurable board with SystemC-VHDL ».
In 15th IEEE International Conference on Electronics, Circuits and Systems (ICECS) (St. Julian's, Malta, Aug. 31-Sept. 03, 2008)
pp. 1159-1162.
IEEE.
Bougataya, Mohammed, Lakhsasi, Ahmed, Norman, Richard, Prytula, Richard, Blaquière, Yves et Savaria, Yvon.
2008.
« Steady state thermal analysis of a reconfigurable wafer-scale circuit board ».
In IEEE Canadian Conference on Electrical and Computer Engineering (CCECE) (Niagara Falls, ON, Canada, May 04-07, 2008)
pp. 411-415.
IEEE.
Norman, Richard, Lepercq, Etienne, Blaquière, Yves, Valorge, Olivier, Basile-Bellavance, Yan, Prytula, Richard et Savaria, Yvon.
2008.
« An interconnection network for a novel reconfigurable circuit board ».
In Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA) (Montreal, QC, Canada, June 22-25, 2008)
pp. 129-132.
IEEE.
Norman, Richard, Valorge, Olivier, Blaquière, Yves, Lepercq, Etienne, Basile-Bellavance, Yan, El-Alaoui, Youssef, Prytula, Richard et Savaria, Yvon.
2008.
« An active reconfigurable circuit board ».
In Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA) (Montreal, QC, Canada, June 22-25, 2008)
pp. 351-354.
IEEE.
Valorge, Olivier, Nguyen, Anh Tuan, Blaquière, Yves, Norman, Richard et Savaria, Yvon.
2008.
« Digital signal propagation on a wafer-scale smart active programmable interconnect ».
In 15th IEEE International Conference on Electronics, Circuits and Systems (ICECS) (St. Julian's, Malta, Aug. 31 - Sept. 03, 2008)
pp. 1059-1062.
IEEE. 2007
Blaquière, Yves, Savaria, Yvon et Fouladi, Jaouad El.
2007.
« Digital measurement technique for capacitance variation detection on integrated circuit I/Os ».
In 14th IEEE International Conference on Electronics, Circuits and Systems (ICECS) (Marrakech, Morocco, Dec. 11-14, 2007)
pp. 42-45.
IEEE. 2006Blaquière, Yves. 2006. « Le génie microélectronique et l'évolution des technologies ». Communication lors de la conférence : Congrès annuel de l'Association des professeurs en sciences du Québec (APSQ) (Montréal, QC, Canada, Nov. 2006). 2005Blaquière, Yves. 2005. « Le génie microélectronique et l'évolution des technologies - le changement grandeur nature ». Communication lors de la conférence : Congrès de l'Association des professeurs en sciences du Québec (APSQ) (Thetford Mines, QC, Canada, Oct. 2005). 2004Savaria, Yvon et Blaquière, Yves (inventeurs) 9 mars 2004. « Methods, apparatus, and systems for reducing interference on nearby conductors ». Hyperchip Inc. (titulaire(s)). Brevet américain US 6,703,868. 2000Cantin, M.-A., Blaquière, Y., Savaria, Y., Lavoie, P. et Granger, E.. 2000. « Effets de quantification sur l'implantation digital du réseau de neurone Fuzzy ». Affiche présentée lors de la conférence : Congrès de l'ACFAS (Montreal, QC, Canada, 15-19 mai 2000).
Cantin, M.-A., Savaria, Y., Blaquière, Y., Granger, E. et Lavoie, P..
2000.
« Analysis of quantization effects in a digital hardware implementation of a fuzzy ART neural network algorithm ».
In ISCAS 2000 Geneva : proceedings of the 2000 IEEE International Symposium on Circuits and Systems (Geneva, Switzerland, May 28-31, 2000)
pp. 141-144.
IEEE. Savaria, Y., Blaquière, Y., Cantin, M.-A., Granger, E., Poiré, P. et Daniel, H.. 2000. « Implementations of the fuzzy ART neural networks on three different plaforms for fast clustering of radar pulses ». Affiche présentée lors de la conférence : GRIAO - Research review, 1998). 1999
Cantin, M.-A., Granger, E., Savaria, Y., Blaquière, Y. et Lavoie, P..
1999.
« Four implementations of the fuzzy ART neural network for high data throughput applications ».
In Proceedings of the third International Conference on Cognitive and Neural Systems (ICCNS'99) (Boston, MA, USA, May 26-29, 1999)
p. 15.
1998
Cantin, M.-A., Blaquière, Y., Savaria, Y., Granger, E. et Lavoie, P..
1998.
« Implementation of the fuzzy ART neural network for fast clustering of radar pulses ».
In Proceedings of the 1998 International Symposium on Circuits and Systems (ISCAS'98) (Monterey, CA, USA, May 31-June 3, 1998)
pp. 458-461.
IEEE. Cantin, M.-A., Savaria, Y., Blaquière, Y., Lavoie, P., Granger, E., Poiré, P. et et al.. 1998. « Implementations of the fuzzy ART neural networks on three different platforms for fast clustering of radar pulses ». Affiche présentée lors de la conférence : TEXPO, Symposium on Microelectronics Research & Development in Canada).
Poiré, Pascal, Cantin, Marc-André, Daniel, Hervé, Blaquière, Yves et Savaria, Yvon.
1998.
« A comparative analysis of fuzzy ART neural network implementations: the advantages of reconfigurable computing ».
In IEEE Symposium on FPGAs for Custom Computing Machines (Napa Valley, CA, USA, Apr. 15-17, 1998)
pp. 304-305.
IEEE Computer Society.
Poire, Pascal, Savaria, Yvon, Daniel, Herve, Cantin, Marc-André et Blaquiere, Yves.
1998.
« Hardware/software codesign of a fuzzy ART neural clusterer: the benefits of configurable computing ».
In Configurable Computing: Technology and Applications (Boston, MA, USA, Nov. 02-03, 1998)
Coll. « Proceedings of SPIE », vol. 3526.
pp. 90-96.
SPIE. 1997
Granger, E., Savaria, Y., Blaquière, Y., Cantin, M.-A. et Lavoie, P..
1997.
« A VLSI architecture for fast clustering with the fuzzy ART neural network ».
Journal of Microelectronic Systems Integration, vol. 5, nº 1.
pp. 3-18. 1996
Blaquière, Yves, Dagenais, Michel et Savaria, Yvon.
1996.
« Timing analysis speed-up using a hierarchical and a multimode approach ».
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 15, nº 2.
pp. 244-255.
Granger, E., Blaquière, Y., Savaria, Y., Cantin, M.-A. et Lavoie, P..
1996.
« A VLSI architecture for fast clustering with the fuzzy ART neural networks ».
In Proceedings of the International Workshop on Neural Networks for Identification, Control, Robotics and Signal/Image Processing (NICROSP'96) (Venice, Italy, Aug. 21-23, 1996)
pp. 117-125.
IEEE. 1995Blaquière, Y., Gagné, G., Savaria, Y. et Evéquoz, C.. 1995. « A new efficient algorithmic-based SEU tolerant system architecture ». Affiche présentée lors de la conférence : 32nd Annual International Nuclear and Space Radiation Effects Conference (Madison, WI, USA).
Blaquière, Yves, Gagné, Gabriel, Savaria, Yvon et Évéquoz, Claude.
1995.
« A new efficient algorithmic-based SEU tolerant system architecture ».
IEEE Transactions on Nuclear Science, vol. 42, nº 6 pt 1.
pp. 1599-1606.
Blaquière, Yves, Gagné, Gabriel, Savaria, Yvon et Évéquoz, Claude.
1995.
« Cost analysis of a new algorithmic-based soft-error tolerant architecture ».
In IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems (DFT'95) (Lafayette, LA, USA, Nov. 13-15, 1995)
pp. 189-197.
IEEE. 1993
Blaquière, Yves, Dagenais, Michel et Savaria, Yvon.
1993.
« A new accurate and hierarchical timing analysis approach ».
In European Conference on Design Automation with the European Event in ASIC Design (Paris, France, Feb. 22-25, 1993)
pp. 449-454.
IEEE Computer Society Press. 1991
Blaquière, Yves, Dagenais, Michel et Savaria, Yvon.
1991.
« Fast timing analysis of VLSI circuits: A dynamic and hierarchical approach ».
In IEEE International Symposium on Circuits and Systems Part 4 (of 5) (Singapore, June 11, 1991 - June 14, 1991)
pp. 2398-2402.
IEEE. 1990
Blaquière, Yves et Davidson, Jacob.
1990.
« VHDL design of a priority interrupt controller and synchronizer for the MC68008 ».
Microprocessors and Microsystems, vol. 14, nº 7.
pp. 474-478. 1987
Blaquière, Yves et Savaria, Yvon.
1987.
« Area overhead analysis of SEF: A design methodology for tolerating SEU ».
IEEE Transactions on Nuclear Science, vol. 34, nº 6 pt. 1.
pp. 1481-1486. 1985
Blaquière, Y. et Savaria, Y..
1985.
« Area overhead analysis of soft-errors filtering register ».
In Canadian Conference on Very Large Scale Integration, Toronto, November 4-5, 1985 : technical digest = 1985 Conférence canadienne sur l'intégration à très grande échelle (VLSI), Toronto, 4-5 Novembre, 1985 (Toronto, ON, Canada, 04-05 nov. 1985)
pp. 26-29.
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