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Liste des publications de "Thibeault, Claude"Nombre de documents archivés : 172. 2023
Pichette, Simon et Thibeault, Claude.
2023.
« Knowledge-intensive diagnostics using case-based reasoning and synthetic case generation ».
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 42, nº 7.
pp. 2404-2417. 2021
Fiorentino, Mickael, Thibeault, Claude et Savaria, Yvon.
2021.
« Introducing KeyRing self-timed microarchitecture and timing-driven design flow ».
IET Computers and Digital Techniques, vol. 15, nº 6.
pp. 409-426. 2020
Hasib, Omar Al-Terkawi, Savaria, Yvon et Thibeault, Claude.
2020.
« Optimization of small-delay defects test quality by clock speed selection and proper masking based on the weighted slack percentage ».
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 28, nº 3.
pp. 764-776. 2019
Al-Terkawi Hasib, Omar, Savaria, Yvon et Thibeault, Claude.
2019.
« Multi-PVT-point analysis and comparison of recent small-delay defect quality metrics ».
Journal of Electronic Testing: Theory and Applications (JETTA), vol. 35, nº 6.
pp. 823-838.
Benyoussef, Maryem, Thibeault, Claude et Savaria, Yvon.
2019.
« A prediction model for implementing DVS in single-rail bundled-data handshake-free asynchronous circuits ».
In 2019 IEEE International Symposium on Circuits and Systems (ISCAS) (Sapporo, Japan, May 26-29, 2019)
Institute of Electrical and Electronics Engineers Inc..
Darvishi, Mostafa, Audet, Yves, Blaquière, Yves, Thibeault, Claude et Pichette, Simon.
2019.
« On the susceptibility of SRAM-based FPGA routing network to delay changes induced by ionizing radiation ».
IEEE Transactions on Nuclear Science, vol. 66, nº 3.
pp. 643-654.
Fiorentino, Mickael, Thibeault, Claude, Savaria, Yvon, Gagnon, François, Awad, Tom, Morrissey, Doug et Laurence, Michel.
2019.
« AnARM: a 28nm energy efficient ARM processor based on Octasic asynchronous technology ».
In 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) (Hirosaki, Japan, May 12-15, 2019)
pp. 58-59.
Los Alamitos, CA, USA : IEEE Computer Society. 2018
Giard, Pascal, Balatsoukas-Stimming, Alexios, Sarkis, Gabi, Thibeault, Claude et Gross, Warren J..
2018.
« Fast low-complexity decoders for low-rate polar codes ».
Journal of Signal Processing Systems, vol. 90, nº 5.
pp. 675-685.
Giard, Pascal, Sarkis, Gabi, Leroux, Camille, Thibeault, Claude et Gross, Warren J..
2018.
« Low-latency software polar decoders ».
Journal of Signal Processing Systems, vol. 90, nº 5.
pp. 761-775.
Hasib, Omar Al-Terkawi, Crepeau, Daniel, Awad, Thomas, Dulipovici, Andrei, Savaria, Yvon et Thibeault, Claude.
2018.
« Exploiting built-in delay lines for applying launch-on-capture at-speed testing on self-timed circuits ».
In IEEE 36th VLSI Test Symposium (VTS) (San Francisco, CA, USA, Apr. 22-25, 2018)
Los Alamitos, CA, USA : IEEE Computer Society.
Thibeault, Claude et Gagnon, Ghyslain.
2018.
« On the analysis and the mitigation of power supply noise and power distribution network impedance variation for scan-based delay testing techniques ».
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, nº 7.
pp. 1377-1390. 2017
Amrhar, Abdessamad, Kisomi, Alireza Avakh, Zhang, Eric, Zambrano, Joe, Thibeault, Claude et Landry, René Jr..
2017.
« Multi-mode reconfigurable software defined radio architecture for avionic radios ».
In Integrated Communications, Navigation and Surveillance Conference (ICNS) (Herndon, VA, USA, Apr. 18-20, 2017)
2D1/1-2D1/10.
Piscataway, NJ, USA : IEEE.
Fiorentino, Mickaël, Savaria, Yvon et Thibeault, Claude.
2017.
« FPGA implementation of Token-based Self-timed processors: A case study ».
In 15th IEEE International New Circuits and Systems Conference (NEWCAS) (Strasbourg, France, June 25-28, 2017)
pp. 313-316.
Piscataway, NJ, USA : IEEE.
Giard, Pascal, Balatsoukas-Stimming, Alexios, Muller, Thomas Christoph, Bonetti, Andrea, Thibeault, Claude, Gross, Warren J., Flatresse, Philippe et Burg, Andreas.
2017.
« PolarBear: A 28 nm FD-SOI ASIC for decoding of polar codes ».
IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 7, nº 4.
pp. 616-629.
Giard, Pascal, Thibeault, Claude et Gross, Warren J..
2017.
« High-speed decoders for polar codes ».
Springer. 98 p.
Thibeault, Claude et Louati, Ali.
2017.
« A new delay testing signal scheme robust to power distribution network impedance variation ».
In IEEE 35th VLSI Test Symposium (VTS) (Las Vegas, NV, USA,, Apr. 09-12, 2017)
IEEE Computer Society. Zambrano, Joe, Amrhar, Abdessamad, Kisomi, Alireza Avakh, Zhang, Eric, Thibeault, Claude et Landry, René Jr.. 2017. « Multi-mode reconfigurable software defined radio (SDR) architecture for avionic radios ». Communication lors de la conférence : Integrated Communications, Navigation and Surveillance Conference (ICNS) (Herndon, VA, USA, Apr. 18-20, 2017). 2016
Fiorentino, Mickael, Savaria, Yvon, Thibeault, Claude et Gervais, Pascal.
2016.
« A practical design method for prototyping self-timed processors using FPGAs ».
In 2016 IEEE International Symposium on Circuits and Systems (ISCAS) (Montréal, QC, Canada, May 22-25, 2016)
pp. 1754-1757.
Piscataway, NJ, USA : IEEE.
Ghodbane, A., Saad, M., Hobeika, C., Boland, J. F. et Thibeault, C..
2016.
« Design of a tolerant flight control system in response to multiple actuator control signal faults induced by cosmic rays ».
IEEE Transactions on Aerospace and Electronic Systems, vol. 52, nº 2.
pp. 681-697.
Giard, Pascal, Balatsoukas-Stimming, Alexios, Muller, Thomas Christoph, Burg, Andreas, Thibeault, Claude et Gross, Warren J..
2016.
« A multi-Gbps unrolled hardware list decoder for a systematic polar code ».
In 50th Asilomar Conference on Signals, Systems and Computers (Pacific Grove, CA, USA, Nov. 06-09, 2016)
pp. 1194-1198.
Piscataway, NJ, USA : IEEE.
Giard, Pascal, Sarkis, Gabi, Balatsoukas-Stimming, Alexios, YouZhe, Fan, Chi-ying, Tsui, Burg, Andreas, Thibeault, Claude et Gross, Warren J..
2016.
« Hardware decoders for polar codes: An overview ».
In 2016 IEEE International Symposium on Circuits and Systems (ISCAS) (Montréal, QC, Canada, May 22-25, 2016)
pp. 149-152.
Institute of Electrical and Electronics Engineers Inc..
Giard, Pascal, Sarkis, Gabi, Thibeault, Claude et Gross, Warren J..
2016.
« Multi-mode unrolled architectures for polar decoders ».
IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 63, nº 9.
pp. 1443-1453.
Hashemi, Seyyed Ali, Balatsoukas-Stimming, Alexios, Giard, Pascal, Thibeault, Claude et Gross, Warren J..
2016.
« Partitioned successive-cancellation list decoding of polar codes ».
In 2016 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP) (Shanghai, China, Marc. 20-25, 2016)
pp. 957-960.
Piscataway, NJ, USA : IEEE.
Hasib, Omar Al-Terkawi, Savaria, Yvon et Thibeault, Claude.
2016.
« WeSPer: a flexible small delay defect quality metric ».
In 2016 IEEE 34th VLSI Test Symposium (VTS) (Las Vegas , NV, USA, Apr. 25-27, 2016)
IEEE Computer Society.
Prieur, Donavan, Granger, Éric, Savaria, Yvon et Thibeault, Claude.
2016.
« Efficient identification of faces in video streams using low-power multi-core devices ».
In
Handbook of Pattern Recognition and Computer Vision.
5th ed.
pp. 427-454. World Scientific.
Sarkis, Gabi, Giard, Pascal, Vardy, Alexander, Thibeault, Claude et Gross, Warren J..
2016.
« Fast list decoders for polar codes ».
IEEE Journal on Selected Areas in Communications, vol. 34, nº 2.
pp. 318-328.
Sarkis, Gabi, Tal, Ido, Giard, Pascal, Vardy, Alexander, Thibeault, Claude et Gross, Warren J..
2016.
« Flexible and low-complexity encoding and decoding of systematic polar codes ».
IEEE Transactions on Communications, vol. 64, nº 7.
pp. 2732-2745.
Souari, Anis, Thibeault, Claude, Blaquiere, Yves et Velazco, Raoul.
2016.
« Towards an efficient SEU effects emulation on SRAM-based FPGAs ».
Microelectronics Reliability, vol. 66.
pp. 173-182.
Tazi, Fatima Zahra, Thibeault, Claude et Savaria, Yvon.
2016.
« Detailed analysis of radiation-induced delays on I/O blocks of an SRAM-based FPGA ».
In 2016 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE) (Vancouver, BC, Canada, May 15-18, 2016)
Piscataway, NJ, USA : IEEE. 2015
Fiorentino, Mickael, Al-Terkawi, Omar, Savaria, Yvon et Thibeault, Claude.
2015.
« Self-timed circuits FPGA implementation flow ».
In 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS). Proceedings (Grenoble, France, June 7-10, 2015)
Piscataway, NJ, USA : IEEE.
Giard, P., Sarkis, G., Thibeault, Claude et Gross, W. J..
2015.
« 237 Gbit/s unrolled hardware polar decoder ».
Electronics Letters, vol. 51, nº 10.
pp. 762-763.
Giard, Pascal, Sarkis, Gabi, Thibeault, Claude et Gross, Warren J..
2015.
« A 638 Mbps low-complexity rate 1/2 polar decoder on FPGAs ».
In 2015 IEEE Workshop on Signal Processing Systems (SiPS) (Hangzhou, China, Oct. 14-16, 2015)
Piscataway, NJ, USA : IEEE.
Hobeika, Christelle, Thibeault, Claude et Boland, Jean-François.
2015.
« Functional constraint extraction from register transfer level for ATPG ».
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 23, nº 2.
pp. 407-412.
Léonard, Marc-André, Boland, Jean-François, Jégo, Christophe et Thibeault, Claude.
2015.
« Towards analysis of the radiation sensitivity of digital designs at high level of abstraction ».
In SAE 2015 AeroTech Congress & Exhibition (Seattle, WA, USA, Sept. 22-24, 2015)
Coll. « SAE Technical Papers », vol. 2015-01-2549.
SAE International.
Souari, Anis, Thibeault, Claude, Blaquière, Yves et Velazco, Raoul.
2015.
« An automated fault injection for evaluation of LUTs robustness in SRAM-based FPGAs ».
In 2015 IEEE East-West Design & Test Symposium (EWDTS) (Batumi, GA, USA, Sept. 26-29, 2015)
IEEE.
Souari, Anis, Thibeault, Claude, Blaquière, Yves et Velazco, Raoul.
2015.
« Optimization of SEU emulation on SRAM FPGAs based on sensitiveness analysis ».
In 2015 IEEE 21st International On-Line Testing Symposium (IOLTS) (Halkidiki, Greece, July 6-8, 2015)
pp. 36-39.
Piscataway, NJ, USA : IEEE.
Trudeau, L. C., Gagnon, G., Gagnon, F., Thibeault, C., Awad, T. et Morrissey, D..
2015.
« A low-latency, energy-efficient L1 cache based on a self-timed pipeline ».
In 2015 21st IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) (Mountain View, CA, USA, May 4-6, 2015)
pp. 17-18.
Los Alamitos, CA, USA : IEEE Computer Society. 2014Darvishi, M., Audet, Y., Blaquière, Y. et Thibeault, C.. 2014. « Circuit level modeling of extra combinational delays in SRAM FPGAs due to transient ionizing radiation ». Affiche présentée lors de la conférence : IEEE Nuclear and Space Radiation Effects Conference (Paris, France, July 14-18, 2014).
Darvishi, Mostafa, Audet, Yves, Blaquière, Yves, Thibeault, Claude, Pichette, Simon et Tazi, Fatima Zahra.
2014.
« Circuit level modeling of extra combinational delays in SRAM-based FPGAs due to transient ionizing radiation ».
IEEE Transactions on Nuclear Science, vol. 61, nº 6.
pp. 3535-3542.
Ghodbane, A., Saad, M., Boland, J.-F. et Thibeault, C..
2014.
« Applied cosmic rays fault accomodation in flight control systems using fault reconstruction based FDD and SMC reconfiguration ».
In ICMICE Prague 2014, International Conference on Modelling, Identification and Control Engineering (Preague, Czech Republic, July 7-8, 2014)
Ghodbane, A, Saad, Maarouf, Boland, Jean-François et Thibeault, Claude.
2014.
« Applied actuator fault accommodation in flight control systems using fault reconstruction based FDD and SMC reconfiguration ».
International Journal of Mechanical and Mechatronics Engineering, vol. 8, nº 7.
pp. 1141-1146.
Ghodbane, Azeddine, Saad, Maarouf, Boland, Jean-François et Thibeault, Claude.
2014.
« Sliding mode reconfigurable control for cosmic rays faults in flight systems ».
In ASME International Mechanical Engineering Congress and Exposition, Proceedings (IMECE) (Montreal, QC, Canada, Nov. 14-20, 2014)
American Society of Mechanical Engineers (ASME).
Giard, P., Sarkis, G., Thibeault, Claude et Gross, W. J..
2014.
« Fast software polar decoders ».
In 2014 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP) (Florence, Italy, May 4-9, 2014)
pp. 7555-7559.
Piscataway, N. J., USA : IEEE.
Hobeika, C., Pichette, S., Leonard, M. A., Thibeault, Claude, Boland, Jean-François et Audet, Y..
2014.
« Multi-abstraction level signature generation and comparison based on radiation single event upset ».
In 2014 IEEE 20th International On-Line Testing Symposium (IOLTS) (Platja d'Aro, Girona, Spain, July 7-9, 2014)
pp. 212-215.
Piscataway, N. J., USA : IEEE.
Hoque, Khaza Anuarul, Ait Mohamed, Otmane, Savaria, Yvon et Thibeault, Claude.
2014.
« Early Analysis of Soft Error Effects for Aerospace Applications Using Probabilistic Model Checking ».
In Formal Techniques for Safety-Critical Systems - 2nd International Workshop, FTSCS 2013, Revised Selected Papers (Queenstown, New Zealand, Oct. 29-30, 2013)
Coll. « Communications in Computer and Information Science », vol. 419.
pp. 54-70.
Springer Verlag.
Hoque, Khaza Anuarul, Mohamed, O. Ait, Savaria, Yvon et Thibeault, Claude.
2014.
« Probabilistic model checking based DAL analysis to optimize a combined TMR-blind-scrubbing mitigation technique for FPGA-based aerospace applications ».
In 2014 Twelfth ACM/IEEE Conference on Formal Methods and Models for Codesign (MEMOCODE) (Lausanne, Switzerland, Oct. 19-21, 2014)
pp. 175-184.
Piscataway, N. J., USA : IEEE.
Jalloul, Taher, Ajib, Wessam, Yeste-Ojeda, Omar A., Landry, René Jr et Thibeault, Claude.
2014.
« DME/DME navigation using a single low-cost SDR and sequential operation ».
In AIAA/IEEE Digital Avionics Systems Conference - Proceedings (Colorado Springs, CO, USA, Oct. 5-9, 2014)
3C21-23C29.
Institute of Electrical and Electronics Engineers Inc..
Sarkis, G., Giard, P., Thibeault, Claude et Gross, W. J..
2014.
« Autogenerating software polar decoders ».
In 2014 IEEE Global Conference on Signal and Information Processing (GlobalSIP) (Atlanta, GA, USA, Dec. 3-5, 2014)
pp. 6-10.
Piscataway, N. J., USA : IEEE.
Sarkis, G., Giard, P., Vardy, A., Thibeault, Claude et Gross, W. J..
2014.
« Fast Polar Decoders: Algorithm and Implementation ».
IEEE Journal on Selected Areas in Communications, vol. 32, nº 5.
pp. 946-957.
Sarkis, G., Giard, P., Vardy, A., Thibeault, Claude et Gross, W. J..
2014.
« Increasing the speed of polar list decoders ».
In 2014 IEEE Workshop on Signal Processing Systems (SiPS) (Belfast, Ireland, Oct. 20-22, 2014)
Piscataway, N. J., USA : IEEE. Souari, Anis, Thibeault, Claude, Blaquière, Yves et Velazco, Raoul. 2014. « Towards a realistic SEU effects emulation on SRAM based FPGAs ». Affiche présentée lors de la conférence : IEEE Nuclear and space radiation effects (NRSEC) (Paris, France, July 14-18, 2014).
Tazi, F. Z., Thibeault, Claude, Savaria, Y., Pichette, S. et Audet, Y..
2014.
« On extra delays affecting I/O blocks of an SRAM-based FPGA due to ionizing radiation ».
IEEE Transactions on Nuclear Science, vol. 61, nº 6.
pp. 3138-3145. 2013
Bouanen, S., Thibeault, Claude, Savaria, Y., Tremblay, J. P. et Guchuan, Zhu.
2013.
« Fault tolerant smart transducer interfaces for safety-critical avionics applications ».
In 2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC) (East Syracuse, NY, USA, Oct. 5-10, 2013)
Piscataway, N. J., USA : IEEE. Bouanen, S., Thibeault, Claude, Savaria, Y., Tremblay, J. P. et Guchuan, Zhu. 2013. « Fault tolerant smart transducer interfaces for safety-critical avionics applications ». Communication lors de la conférence : 2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC) (East Syracuse, NY, USA, Oct. 5-10, 2013).
El Alaoui Ismaili, Z., Nabki, F., Ajib, W. et Thibeault, Claude.
2013.
« A 0.35~6.25 GHz cognitive radio frequency synthesizer architecture ».
In 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS) (Colombus, OH, USA, Aug. 4-7, 2013)
pp. 796-9.
Piscataway, N. J., USA : IEEE.
Ghodbane, Azeddine, Saad, Maarouf, Boland, Jean-François et Thibeault, Claude.
2013.
« Design of an actuator fault tolerant flight control system using fault detection and diagnosis ».
In SAE 2013 AeroTech Congress and Exhibition (AEROTECH) (Montreal, QC, Canada, Sept. 24-26, 2013)
Coll. « SAE Technical Papers »
Warrendale, PA, USA : SAE International.
Hobeika, Christelle, Pichette, Simon, Ghodbane, Azeddine, Thibeault, Claude, Audet, Yves, Boland, Jean-François et Saad, Maarouf.
2013.
« Flight Control Fault Models Based on SEU Emulation ».
SAE International Journal of Aerospace, vol. 6, nº 2.
pp. 643-649.
Kaddoum, Georges, Richardson, François-Dominique, Adouni, Sarra, Gagnon, François et Thibeault, Claude.
2013.
« Multi-user multi-carrier differential chaos shift keying communication system ».
In 2013 9th International Wireless Communications and Mobile Computing Conference, IWCMC 2013 (Cagliari, Sardinia, Italy, July 1-5, 2013)
pp. 1798-1802.
Washington, D. C., USA : IEEE Computer Society.
Robache, R., Boland, Jean-François, Thibeault, Claude et Savaria, Y..
2013.
« A methodology for system-level fault injection based on gate-level faulty behavior ».
In 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS) (Paris, France, June 16-19, 2013)
Piscataway, N. J., USA : IEEE.
Thibeault, Claude, Hariri, Y., Hasan, S. R., Hobeika, C., Savaria, Y., Audet, Y. et Tazi, F. Z..
2013.
« A library-based early soft error sensitivity analysis technique for SRAM-based FPGA design ».
Journal of Electronic Testing: Theory and Applications, vol. 29, nº 4.
pp. 457-471.
Tremblay, J. P., Savaria, Y., Guchuan, Zhu, Thibeault, Claude et Bouanen, S..
2013.
« A hardware prototype for integration, test and validation of avionic networks ».
In 2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC) (East Syracuse, NY, USA, Oct. 5-10, 2013)
pp. 2-5.
Piscataway, N. J., USA : IEEE. Tremblay, J. P., Savaria, Y., Guchuan, Zhu, Thibeault, Claude et Bouanen, S.. 2013. « A hardware prototype for integration, test and validation of avionic networks ». Communication lors de la conférence : 2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC) (East Syracuse, NY, USA, Oct. 5-10, 2013). 2012
Bouanen, Marwen, Gagnon, François, Kaddoum, Georges, Couillard, Denis et Thibeault, Claude.
2012.
« An LPI design for secure OFDM systems ».
In 2012 IEEE Military Communications Conference (MILCOM) (Orlando, FL, USA, Nov. 1, 2012)
Piscataway, NJ : Institute of Electrical and Electronics Engineers Inc..
Ghodbane, A., Saad, Maarouf, Boland, Jean-François et Thibeault, Claude.
2012.
« Fault tolerant flight control system using emmae method and reconfiguration with sliding mode technique ».
In 25th IEEE Canadian Conference on Electrical and Computer Engineering (CCECE) (Montreal, QC, Canada, April 29-May 2, 2012)
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Giard, Pascal, Kaddoum, Georges, Gagnon, François et Thibeault, Claude.
2012.
« FPGA implementation and evaluation of discrete-time chaotic generators circuits ».
In 38th Annual Conference on IEEE Industrial Electronics Society, IECON 2012 (Montreal, QC, Canada, Oct. 25-28, 2012)
pp. 3221-3224.
Washington, DC : IEEE Computer Society.
Leduc-Primeau, François, Raymond, Alexandre J., Giard, Pascal, Cushon, Kevin, Thibeault, Claude et Gross, Warren J..
2012.
« High-throughput LDPC decoding using the RHS algorithm ».
In 2012 Conference on Design and Architectures for Signal and Image Processing (DASIP) (Karlsruhe, Germany, Oct. 23-25, 2012)
pp. 192-197.
Piscataway, NJ : IEEE.
Thibeault, C., Hariri, Y. et Hobeika, C..
2012.
« Tester memory requirements and test application time reduction for delay faults with Digital Captureless test Sensors ».
Journal of Electronic Testing, vol. 28, nº 2.
pp. 229-242. Thibeault, C., Pichette, S., Audet, Y., Savaria, Y., Rufenacht, H., Gloutnay, E. et et al.. 2012. « On extra combinational delays in SRAM FPGAs due to radiations ». Communication lors de la conférence : IEEE Nuclear and Space Radiation Effects Conference (Miami, FL, USA, July 16-20, 2012). Thibeault, C., Pichette, S., Audet, Y., Savaria, Y., Rufenacht, H., Gloutnay, E. et Et all. 2012. « Méthodologie de conception, vérification, et test des systèmes embarqués tolérants aux radiations ». Affiche présentée lors de la conférence : AVIO403 Journée CRIAQ : Destination 2022).
Thibeault, Claude, Pichette, Simon, Audet, Yves, Savaria, Yvon, Rufenacht, H., Gloutnay, E., Blaquière, Yves, Moupfouma, F. et Batani, Naïm.
2012.
« On extra combinational delays in SRAM FPGAs due to transient ionizing radiations ».
IEEE Transactions on Nuclear Science, vol. 59, nº 6.
pp. 2959-2965.
Tremblay, Jose-Philippe, Savaria, Yvon, Zhu, Guchuan, Thibeault, Claude et Bouanen, Safwen.
2012.
« A System Architecture for Smart Sensors Integration in Avionics Applications ».
SAE International Journal of Aerospace, vol. 5, nº 1.
pp. 189-195.
Trentin, Davide, Savaria, Yvon, Zhu, Guchuan et Thibeault, Claude.
2012.
« An AFDX Switch Fabric Hardware Core for Avionic Network Prototyping and Characterization ».
SAE International Journal of Aerospace, vol. 5, nº 1.
pp. 181-188. 2011
Despins, Charles, Labeau, Fabrice, Le Ngoc, Tho, Labelle, Richard, Cheriet, Mohamed, Thibeault, Claude, Gagnon, François, Leon-Garcia, Alberto, Cherkaoui, Omar, St. Arnaud, Bill, McNeill, Jacques, Lemieux, Yves et Lemay, Mathieu.
2011.
« Leveraging green communications for carbon emission reductions : techniques, testbeds and emerging carbon footprint standards ».
IEEE Communications Magazine, vol. 49, nº 8.
pp. 101-109.
Irobi, Sandra, Al-Ars, Zaid, Hamdioui, Said et Thibeault, Claude.
2011.
« Testing for parasitic memory effect in SRAMs ».
In 20th Asian Test Symposium (ATS) (New Delhi, India, Nov. 20-23, 2011)
pp. 407-412.
Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.
Joliveau, Marc, Gendreau, Michel, Gagnon, François et Thibeault, Claude.
2011.
« Low complexity low power non-recursive digital filters with unconstrained topology ».
In 20th European Conference on Circuit Theory and Design (ECCTD) (Linkoping, Sweden, Aug. 29-31, 2011)
pp. 865-868.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Joliveau, Marc, Giard, Pascal, Gendreau, Michel, Gagnon, François et Thibeault, Claude.
2011.
« Design of low complexity multiplierless digital filters with optimized free structure using a population-based metaheuristic ».
In International Symposium on Signals, Circuits and Systems (ISSCS) (Iasi, Romania, June 30-July 1, 2011)
pp. 249-252.
Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.
Thibeault, Claude et Hariri, Yassine.
2011.
« C Delta IDDQ : improving current-based testing and diagnosis through modified test pattern generation ».
IEEE Transactions on Very Large Scale Integration (VlSI) Systems, vol. 19, nº 1.
pp. 130-141. 2010Gagnon, François, Savaria, Yvon, Dumais, Philippe, Ammari, Mohamed Lassaad et Thibeault, Claude (inventeurs) 6 avril 2010. « Multi-equalization method and apparatus ». École de technologie supérieure (titulaire(s)). Brevet américain US 7,693,490.
Hobeika, Christelle, Thibeault, Claude et Boland, Jean-François.
2010.
« Illegal state extraction from Register Transfer Level ».
In 8th IEEE International NEWCAS Conference (NEWCAS) (Montreal, Canada, June 20-23, 2010)
pp. 245-248.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Kouki, Ammar B., Masri, I., Gagnon, François et Thibeault, Claude.
2010.
« On the embedded vector RF measurements in frequency agile and reconfigurable front-ends ».
In 5th Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS) (Hammamet, Tunisia, Mar. 23-25, 2010)
New York, NY, USA : Institute of Electrical and Electronics Engineers. Routhier, Nicholas, Thibeault, Claude, Belzile, Jean, Malouin, Daniel, Carpentier, Pierre-Paul et Dallaire, Martin (inventeurs) 25 août 2010. « Process and system for encoding and playback of stereoscopic video sequences ». Sensio Technologies Inc. (Montreal, Canada) (titulaire(s)). Brevet américain US 7,580,463. Routhier, Nicholas, Thibeault, Claude, Belzile, Jean, Malouin, Daniel, Carpentier, Pierre-Paul et Dallaire, Martin (inventeurs) 30 novembre 2010. « Process and system for encoding and playback of stereoscopic video sequences ». Sensio Technologies Inc. (Montreal, Canada) (titulaire(s)). Brevet américain US 7,844,001. 2009
Atwal, Sacha, Gagnon, François et Thibeault, Claude.
2009.
« An LPI wireless communication system based on chaotic modulation ».
In IEEE Military Communications Conference (MILCOM) (Boston, MA, USA, Oct. 18-21, 2009)
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers Inc..
Ayachi, D., Savaria, Yvon et Thibeault, Claude.
2009.
« A configurable platform for MPSoCs based on application specific instruction set processors ».
In Joint IEEE North-East Workshop on Circuits and Systems and Taisa Conference (NEWCAS-TAISA) (Toulouse, France, June 28-July 01, 2009)
pp. 388-391.
New York, NY, USA : Institute of Electrical and Electronics Engineers. Fecteau, Karl, Thibeault, Claude, Savaria, Yvon, Blaquière, Yves, Laurin, Jean-Jacques et Jin, Zhong-Fang (inventeurs) 27 octobre 2009. « Methods, apparatus, and systems for reducing interference on nearby conductors ». Norman, Richard S. (titulaire(s)). Brevet américain US 7,609,778.
Gagné, René, Belzile, Jean et Thibeault, Claude.
2009.
« Asynchronous component implementation methodology for GALS design in FPGAs ».
In Joint IEEE North-East Workshop on Circuits and Systems and Taisa Conference (NEWCAS-TAISA) (Toulouse, France, June 28-July 01, 2009)
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Gagné, René, Belzile, Jean et Thibeault, Claude.
2009.
« From synchronous to GALS : a new architecture for FPGAs ».
Microelectronics Journal, vol. 40, nº 11.
pp. 1657-1666.
Hobeika, Christelle, Thibeault, Claude et Boland, Jean-François.
2009.
« Automatic verification methodology based on structural test patterns ».
In Joint IEEE North-East Workshop on Circuits and Systems and Taisa Conference (NEWCAS-TAISA) (Toulouse, France, June 28-July 01, 2009)
pp. 292-295.
New York, NY, USA : Institute of Electrical and Electronics Engineers. Hobeika, Christelle, Thibeault, Claude et Boland, Jean-François. 2009. « Automatic verification methodology based on structural test patterns ». Affiche présentée lors de la conférence : 27th VLSI Test Symposium (IEEE VTS) (Santa Cruz, Calif., USA, May 3-7, 2009).
Thibeault, Claude, Hariri, Y. et Hobeika, Christelle.
2009.
« On captureless delay test points ».
In Joint IEEE North-East Workshop on Circuits and Systems and Taisa Conference (NEWCAS-TAISA) (Toulouse, France, June 28-July 01, 2009)
pp. 280-283.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Yakoub, M. El Mustapha Ait, Sawan, M. et Thibeault, Claude.
2009.
« A neuromimetic ultra low-power ADC for bio-sensing applications ».
In Joint IEEE North-East Workshop on Circuits and Systems and Taisa Conference (NEWCAS-TAISA) (Toulouse, France, June 28-July 01, 2009)
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers. 2008
Hobeika, Christelle, Thibeault, Claude et Boland, Jean-François.
2008.
« Use of structural tests in RTL verification ».
In 1st Microsystems and Nanoelectronics Research Conference (MNRC) (Ottawa, Canada, Oct. 15, 2008)
pp. 133-136.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers Computer Society.
Sahraii, Negin, Savaria, Yvon, Thibeault, Claude et Gagnon, François.
2008.
« Scheduling of turbo decoding on a multiprocessor platform to manage its processing effort variability ».
In Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA) (Montreal, Canada, June 22-25, 2008)
pp. 73-76.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Savaria, Yvon, Sahraii, Neguin, Thibeault, Claude et Gagnon, François.
2008.
« Modeling and Dynamic Scheduling of Turbo Decoding for a Homogeneous Multiprocessor Platform ».
In CMOS Emerging Technologies Workshop (Vancouver, BC, Canada, Aug. 5-7, 2008)
Tremblay, José-Philippe, Savaria, Yvon, Thibeault, Claude et Mbaye, Maria.
2008.
« Improving resource utilization in an multiple asynchronous ALU DSP architecture ».
In 1st Microsystems and Nanoelectronics Research Conference (MNRC) (Ottawa, Canada, Oct. 15, 2008)
pp. 25-28.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers Computer Society. 2007Belzile, Jean, Thibeault, Claude, Gagnon, François et Batani, Naïm K. (inventeurs) 16 octobre 2007. « Method and apparatus for testing a device in an electronic component ». Socovar S.E.C, Thibeault, Claude, Gagnon, François (titulaire(s)). Brevet américain US 7,284,178.
Futcha, S., Thibeault, Claude et Gagnon, François.
2007.
« Predicting CPU requirements with variability equations of Zf-Sqrd and rake receiver in a DSP context ».
In IEEE Northeast Workshop on Circuits and Systems (NEWCAS) (Montreal, Canada, Aug. 5-8, 2007)
pp. 1209-1212.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Futcha, Sandrine, Thibeault, Claude, Gagnon, François et Agba, Basile L..
2007.
« Extraction of primitives from ZF-SQRD algorithm for a DSP platform ».
In Canadian Conference on Electrical and Computer Engineering (CCECE) (Vancouver, Canada, April 22-26, 2007)
pp. 1046-1049.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers. Gagné, R., Belzile, Jean et Thibeault, Claude. 2007. « Architecture for efficient GALS support in commercial FPGAs ». Communication lors de la conférence : IEEE North-East Workshop on Circuits and Systems (NEWCAS) (Montreal, QC, Canada, Aug. 5-8, 2007).
Gagné, René, Belzile, Jean et Thibeault, Claude.
2007.
« Architecture for efficient GALS support in commercial FPGAs ».
In IEEE North-East Workshop on Circuits and Systems (NEWCAS) (Montreal, QC, Canada, Aug. 5-8, 2007)
pp. 638-641.
Piscataway, N.J. : Institute of Electrical and Electronics Engineers.
Hariri, Y. et Thibeault, Claude.
2007.
« Bridging fault diagnostic tool based on DIDDQ probabilistic signatures, circuit layout parasitics and logic errors ».
IET Computers and Digital Techniques, vol. 1, nº 6.
pp. 694-705.
Thibeault, Claude.
2007.
« On a new outlier rejection technique ».
In IEEE VLSI Test Symposium (Berkeley, CA, USA, May 6-10, 2007)
pp. 97-103.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers Computer Society. 2006
Chureau, A., Savaria, Y., Boland, Jean-François, Zilic, Z., Thibeault, Claude et Gagnon, François.
2006.
« Building heterogeneous functional prototypes using articulated interfaces ».
In IEEE North-East Workshop on Circuits and Systems (NEWCAS) (Gatineau, Que., Canada, June 18-21, 2006)
pp. 137-140.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Dia, S. M. F., Thibeault, Claude et Gagnon, François.
2006.
« A very high speed and efficient CIC decimation filter core ».
In IEEE North-East Workshop on Circuits and Systems (NEWCAS) (Gatineau, Que., Canada, June 18-21, 2006)
pp. 61-64.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers. Gagnon, François, Thibeault, Claude et Belzile, Jean (inventeurs) 19 décembre 2006. « Parallelized infinite impulse response (IIR) and integrator filters ». Socovar S.E.C., Thibeault, Claude, Belzile, Jean (titulaire(s)). Brevet américain US 7,152,084.
Hariri, Y. et Thibeault, Claude.
2006.
« Improving a 3 data-source diagnostic method ».
In IEEE North-East Workshop on Circuits and Systems (NEWCAS) (Gatineau, Que., Canada, June 18-21, 2006)
pp. 149-152.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Thibeault, C., Tremblay, D. et Hariri, Y..
2006.
« Redefining the role of functional testing ».
In IEEE North-East Workshop on Circuits and Systems (NEWCAS) (Gatineau, Que., Canada, June 18-21, 2006)
pp. 133-136.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Thibeault, Claude.
2006.
« Improving digital IC testing with analog circuits ».
In IEEE North-East Workshop on Circuits and Systems (NEWCAS) (Gatineau, Que., Canada, June 18-21, 2006)
pp. 285-288.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers. 2005
Boland, Jean-François, Thibeault, Claude et Zilic, Z..
2005.
« Efficient multi-abstraction level functional verification methodology for DSP applications ».
In Global Signal Processing Expo and Conference (GSPx) (Santa Clara, CA, USA, Sept., 2004)
Boland, Jean-François, Thibeault, Claude et Zilic, Zeljko.
2005.
« Using Matlab and Simulink in a SystemC Verification Environment ».
In Proceedings of Design and Verification Conference (DVCon05) (San Jose, CA, USA, Feb. 14-16, 2005 )
Dumais, P., Cormier, S, Gagnon, François et Thibeault, Claude.
2005.
« On the implementation of a multi-equalizer ».
In IEEE North-East Workshop on Circuits and Systems (NEWCAS) (Gatineau, Que., Canada, June 19-22, 2005)
pp. 287-290.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers. Savaria, Yvon, Lu, Meng et Thibeault, Claude (inventeurs) 22 février 2005. « Method of generating large scale signal paths in a parallel processing system ». Hyperchip Inc. (titulaire(s)). Brevet américain US 6,858,356. Thibeault, Claude (inventeur) 8 novembre 2005. « Integrated circuit testing system and method ». Socovar S.E.C. (titulaire(s)). Brevet américain US 6,964,003.
Thibeault, Claude.
2005.
« On the test quality evaluation of current testing techniques ».
In IEEE International Workshop on Current and Defect Based Testing (DBT) (Palm Springs, CA, USA, May 1, 2005)
pp. 16-22.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers Computer Society. 2004Belzile, Jean et Thibeault, Claude (inventeurs) 5 octobre 2004. « Data driven clocking ». École de technologie supérieure (titulaire(s)). Brevet américain US 6,801,055.
Boland, Jean-François, Chureau, A., Thibeault, Claude, Savaria, Yvon, Gagnon, François et Zilic, Z..
2004.
« An efficient methodology for design and verification of an equalizer for a software defined radio ».
In 2nd Annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS) (Montreal, QC, Canada, June 20-23, 2004)
pp. 73-76.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Carpentier, Pierre-Paul, Kouki, Ammar B. et Thibeault, Claude.
2004.
« A flexible digital platform for real-time control of RF components with application to MIMO channel emulation ».
In Canadian Conference on Electrical and Computer Engineering (Niagara Falls, Canada, May 2-5, 2004)
pp. 665-668.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Carpentier, Pierre-Paul, Poitau, Gwenael, Kouki, Ammar B. et Thibeault, Claude.
2004.
« An integrated digital platform for rapid evaluation of novel wireless architectures ».
In Fourth IEEE International Symposium on Signal Processing and Information Technology (Rome, Italy, Dec. 18-21, 2004)
pp. 148-151.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers. Dumais, P., Ammari, M.L., Gagnon, François et Thibeault, Claude. 2004. « Multi-equalization a powerful adaptive filtering for time varying wireless channel ». Communication lors de la conférence : IEEE Vehicular Technology Conference (Los Angeles, CA, USA, Sept., 2004).
Dumais, Philippe, Ammari, Mohamed L.., Gagnon, François et Thibeault, Claude.
2004.
« Multi-equalization a powerful adaptive filtering for time varying wireless channels ».
In IEEE 60th Vehicular Technology Conference (VTC) (Los Angeles, CA, USA, Sept. 26-29, 2004)
pp. 1744-1747.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers. Grandmaison, M.-E., Belzile, Jean, Thibeault, Claude et Gagnon, François. 2004. « Reconfigurable and efficient FFT/IFFT architecture ». Communication lors de la conférence : Canadian Conference on Electrical and Computer Engineering 2004 (CCECE 04) (Niagara Falls, ON, Canada, May 2-5, 2004).
Grandmaison, Marie-Eve, Belzile, Jean, Thibeault, Claude et Gagnon, François.
2004.
« Frequency domain filter using an accurate reconfigurable FFT/IFFT core ».
In 2nd Annual IEEE Northeast Workshop on Circuits and Systems (Montreal, Canada, June 20-23, 2004)
pp. 165-168.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Grandmaison, Marie-Eve, Belzile, Jean, Thibeault, Claude et Gagnon, François.
2004.
« Reconfigurable and efficient FFT/IFFT architecture ».
In Canadian Conference on Electrical and Computer Engineering (Niagara Falls, Canada, May 2-5, 2004)
pp. 1115-1118.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Thibeault, Claude.
2004.
« On new current signatures and adaptive test technique combination ».
In 22nd IEEE VLSI Test Symposium (Napa Valley, CA, USA, Apr. 25-29, 2004)
pp. 59-64.
Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.
Thibeault, Claude.
2004.
« On the potential of flush delay for characterization and test optimization ».
In IEEE International Workshop on Current and Defect Based Testing (DBT) (Napa Valley, CA, USA, Apr. 25, 2004)
pp. 55-60.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers. 2003
Hariri, Yassine et Thibeault, Claude.
2003.
« 3DSDM : a 3 data-source diagnostic method ».
In 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Boston, MA, USA, Nov. 3-5, 2003)
pp. 117-123.
Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.
Thibeault, Claude.
2003.
« On faster IDDQ measurements ».
Journal of Electronic Testing, vol. 19, nº 6.
pp. 625-635.
Thibeault, Claude.
2003.
« Replacing IDDQ testing: with variance reduction ».
Journal of Electronic Testing, vol. 19, nº 3.
pp. 325-340. 2002
Bing, Qiu, Savaria, Yvon, Meng, Lu, Chunyan, Wang et Thibeault, Claude.
2002.
« Yield modeling of a WSI telecom router architecture ».
In 17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Vancouver, BC, Canada, Nov. 6-8, 2002)
pp. 314-321.
Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.
Thibeault, Claude.
2002.
« Speeding-up IDDQ measurements ».
In 20th IEEE VLSI Test Symposium (Monterey, CA, USA, Apr. 28-May 2, 2002)
pp. 295-301.
Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society. 2001
Batani, Naïm, Thibeault, Claude et Gargour, Christian.
2001.
« An efficient FPGA implementation of a pulse-shaping IIR filter ».
In Canadian Conference on Electrical and Computer Engineering (Toronto, Canada, May 13-16, 2001)
pp. 353-356.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Monte, Ginette, Antaki, Bernard, Patenaude, Serge, Savaria, Yvon, Thibeault, Claude et Trouborst, Pieter.
2001.
« Tools for the characterization of bipolar CML testability ».
In 19th IEEE VLSI Test Symposium (VTS) (Marina Del Rey, CA, USA, Apr. 29-May 3, 2001)
pp. 388-395.
Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society. 2000
Thibeault, Claude.
2000.
« Diagnosis method using IDDQ probabilistic signatures : theory and results ».
Journal of Electronic Testing, vol. 16, nº 4.
pp. 339-353.
Thibeault, Claude.
2000.
« Efficient diagnosis of single/double bridging faults with Delta Iddq probabilistic signatures and Viterbi algorithm ».
In 18th IEEE VLSI Test Symposium (Montreal, Canada, Apr. 30-May 4, 2000)
pp. 431-438.
Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.
Thibeault, Claude.
2000.
« Improving Delta-IDDQ-based test methods ».
In International Test Conference (Atlantic City, NJ, USA, Oct. 3-5, 2000)
pp. 207-216.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Thibeault, Claude.
2000.
« On the adaptation of Viterbi algorithm for diagnosis of multiple bridging faults ».
IEEE Transactions on Computers, vol. 49, nº 6.
pp. 575-587. 1999
Dia, Aminata, Thibeault, Claude, Gargour, Christian et Houle, Jean Louis.
1999.
« On the use of wavelet analysis for IC testing ».
In Troisième conférence internationale sur l'automatisation industrielle, École de technologie supérieure, Montréal, 7-9 juin 1999 : actes de la conférence = Third International Conference on Industrial Automation, École de technologie supérieure, Montréal, (Montreal, Canada, June 7-9, 1999)
21/9-21/12.
Montreal, Canada : International Associaion of Industrial Automation.
Thibeault, Claude.
1999.
« An histogram based procedure for current testing of active defects ».
In International Test Conference (Atlantic City, NJ, USA, Sept. 28-30, 1999)
pp. 714-723.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Thibeault, Claude.
1999.
« On the comparison of Δ IDDQ and IDDQ testing ».
In 17th IEEE VLSI Test Symposium (Dana Point, CA, USA, Apr. 25-29, 1999)
pp. 143-150.
Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.
Thibeault, Claude et Begin, Guy.
1999.
« Scan-based configurable, programmable, and scalable architecture for sliding window-based operations ».
IEEE Transactions on Computers, vol. 48, nº 6.
pp. 615-627. 1998
Hosseinzadeh, E., Belzile, Jean et Thibeault, Claude.
1998.
« VLSI implementation of a high speed second order sigma-delta modulator with high-performance integrators ».
In IEEE Canadian Conference on Electrical and Computer Engineering (Waterloo, Canada, May 24-28, 1998)
pp. 545-548.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Longtin, P., Love, J. M. et Thibeault, C..
1998.
« FPGAs as a proof of concept toward ASICs: a case study ».
In Actes de conférence / Proceedings : Le 5e colloque canadien sur les circuits programmables (FPD'98) : The Fifth Canadian Workshop on Field-Programmable Devices (FPD'98) (Montréal, QC, Canada, June 7-10, 1998)
pp. 94-99.
Thibeault, Claude.
1998.
« Increasing current testing resolution ».
In IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Austin, TX, USA, Nov. 2-4, 1998)
pp. 126-134.
Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.
Thibeault, Claude et Boisvert, L..
1998.
« Can the current behavior of faulty and fault-free ICs and the impact on diagnosis ».
In IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Austin, TX, USA, Nov. 2-4, 1998)
pp. 202-210.
Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.
Thibeault, Claude et Boisvert, L..
1998.
« Diagnosis method based on Iddq probabilistic signatures : experimental results ».
In IEEE International Test Conference (Washington, DC, USA, Oct. 18-21, 1998)
pp. 1019-1026.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers. 1997Bégin, Guy et Thibeault, Claude (inventeurs) 28 octobre 1997. « Method and apparatus for correcting and decoding a sequence of branches representing encoded data bits into estimated information bits ». Université du Québec à Montréal (titulaire(s)). Brevet américain US 5,682,395.
Gagnon, Yves, Savaria, Yvon, Meunier, Mathieu et Thibeault, Claude.
1997.
« Are defected-tolerant circuits with redundancy really cost-effective? ».
Journal of Microelectronic Systems Integration, vol. 5, nº 4.
pp. 199-208.
Gagnon, Yves, Savaria, Yvon, Meunier, Michel et Thibeault, Claude.
1997.
« Are defect-tolerant circuits with redundancy really cost-effective? Complete and realistic cost model ».
In 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 1997. Proceedings (Paris, France, Oct. 20-22, 1997)
pp. 157-165.
Piscataway, NJ, USA : IEEE.
Kafrouni, M., Thibeault, Claude et Savaria, Yvon.
1997.
« A cost model for VLSI/MCM systems ».
In IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Paris, France, Oct. 20-22, 1997)
pp. 148-156.
Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society.
Thibeault, Claude.
1997.
« A novel probabilistic approach for IC diagnosis based on differential quiescent current signatures ».
In 15th IEEE VLSI Test Symposium (Monterey, CA, USA, Apr. 27-May 1, 1997)
pp. 80-85.
Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society. 1996
Savaria, Yvon, Thibeault, Claude et Ivanov, Andre.
1996.
« IEEE VLSI Test Symposium : meeting the quality challenge ».
IEEE Design & Test of Computers, vol. 13, nº 4.
pp. 110-112. Thibeault, Claude. 1996. « A successful industry-university collaboration ». Communication lors de la conférence : Open House 1996 (Montréal, QC, Canada, Apr., 1996).
Thibeault, Claude et Payeur, A..
1996.
« Experimental results from I-DDF testing ».
In IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Boston, MA, USA, Nov. 6-8, 1996)
pp. 185-193.
Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers Computer Society. 1995
Alie, Martin, Belzile, Jean et Thibeault, C.laude.
1995.
« Décodeur M-chemins avec calcul de métrique algébrique ».
In Canadian Conference on Electrical and Computer Engineering, 1995 (Montréal, QC, Canada, Sept. 5-8, 1995)
pp. 225-228.
IEEE.
Batani, N., Thibeault, C., Laurence, M. et Awad, Fred.
1995.
« A multifunction signal processing card with FPD's ».
In The 3rd Canadian Workshop on Field-Programmable Devices (FPD'95) : technology, Tools and Applications : Proceedings (Montreal, QC, Canada, May 29-June 1, 1995)
pp. 179-184.
École Polytechnique.
Crépeau, D. Jr., Thibeault, Claude, Gagnon, François, Batani, Naïm et Bégin, G..
1995.
« FPGA Implementation of a new decoder algorithm for convolutional codes ».
In Actes de conférence - le 3e Colloque Canadien sur les Circuits Intégrés Programmables (FPD'95) : technologie, outils et applications, Montréal, Québec, Canada, May 29 - June 1, 1995 the 3rd Canadian Workshop on Field-Programmable Devices (FPD'95) = Procee (Montréal, QC, Canada, 29 mai-1 juin 1995)
pp. 70-74.
Thibeault, C..
1995.
« Detection and location of embedded critical paths by signal processing of IDD ».
In Proceedings of the IEEE International Mixed Signal Testing Workshop (Grenoble, France, June 20-22, 1995)
pp. 228-232.
Thibeault, C. et Payeur, A..
1995.
« FFT-based test of a yield monitor circuit ».
In Proceedings, the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems (Lafayette, LA, USA, Nov. 13-15, 1995)
pp. 243-251.
IEEE.
Thibeault, Claude.
1995.
« Detection and location of faults and defects using digital signal processing ».
In Proceedings 13th IEEE VLSI Test Symposium (Los Alamitos, CA, USA, Apr. 30-May 3, 1995)
pp. 262-267.
IEEE Computer Society Press.
Thibeault, Claude.
1995.
« Using fourier analyses to enhance IC testability ».
Journal of Microelectronic Systems Integration, vol. 3, nº 2.
pp. 83-96.
Thibeault, Claude et Gagnon, François.
1995.
« Design experience from system level to FPGAs ».
In Actes de conférence - le 3e Colloque Canadien sur les Circuits Intégrés Programmables (FPD'95) : technologie, outils et applications, Montréal, Québec, Canada, May 29 - June 1, 1995 the 3rd Canadian Workshop on Field-Programmable Devices (FPD'95) = Procee (Montréal, QC, Canada, 29 mai-1 juin 1995)
pp. 162-167.
Thibeault, Claude, Savaria, Yvon et Houle, Jean louis.
1995.
« Equivalence proofs of some yield modeling methods for defect-tolerant integrated circuits ».
IEEE Transactions on Computers, vol. 44, nº 5.
pp. 724-728. 1994Bégin, G. et Thibeault, Claude. 1994. « Un nouvel algorithme de décodage pour les codes convolutionnels ». Communication lors de la conférence : 62e Congrès de l'ACFAS (Montréal, QC, Canada, 16-20 mai 1994).
Bégin, Guy et Thibeault, Claude.
1994.
« A connectivity based, table-driven decoder for convolutional codes ».
In 1994 IEEE International Symposium on Information Theory, 1994. Proceedings (Trondheim, Norway, June 27-July 1, 1994)
p. 166.
IEEE.
Thibeault, Claude.
1994.
« Using Fourier analyses to enhance IC testability ».
In IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems (Los Alamitos, CA, USA, Oct. 17-19, 1994)
pp. 280-288.
IEEE Computer Society Press.
Thibeault, Claude.
1994.
« Using sinusoidal stimuli and Fourier analyses for memory IC testing ».
In IEEE International Workshop on Memory Technology, Design and Testing (San Jose, CA, USA, Aug. 8-9, 1994)
pp. 92-97.
Piscataway, NJ, USA : Institute of Electrical and Electronics Engineers.
Thibeault, Claude, Savaria, Yvon et Houle, Jean louis.
1994.
« A fast method to evaluate the optimum number of spares in defect-tolerant integrated-circuits ».
IEEE Transactions on Computers, vol. 43, nº 6.
pp. 687-697. 1993
Crépeau, J., Thibeault, Claude et Savaria, Y..
1993.
« Some results on yield and local design rule relaxation ».
In Proceedings. The IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems (Venice, Italy, Oct. 27-29, 1993)
pp. 144-151.
Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers (IEEE).
Savaria, Y. et Thibeault, Claude.
1993.
« An inexpensive method of testing localized parametric defects in static RAM ».
In Records of the 1993 IEEE International workshop on memory testing (San Jose, CA, USA, Aug. 9-10, 1993)
pp. 90-95.
Institute of Electrical and Electronics Engineers. 1992
Thibeault, Claude et Savaria, Y..
1992.
« Comparing results from defect-tolerant yield models ».
In Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems (Dallas, TX, USA, Nov. 4-6, 1992)
pp. 22-31.
Los Alamitos, CA, USA : Institute of Electrical and Electronics Engineers (IEEE).
Thibeault, Claude, Savaria, Yvon et Houle, J. L..
1992.
« Heuristic prediction of the optimum number of spares in defect-tolerant integrated circuits ».
Journal of Circuits, Systems and Computers, vol. 2, nº 2.
pp. 81-100.
Thibeault, Claude, Savaria, Yvon et Houle, Jean louis.
1992.
« Test quality of hierarchical defect-tolerant integrated circuits ».
Journal of Electronic Testing, vol. 3, nº 1.
pp. 93-102. |
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